STMP3770 PDF

Media System on Chip. Version 1. Host, Debug. UI: Rotary. FM Tuner. NAND Flash.

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All rights reserved. SigmaTel, Inc. SigmaTel reserves the right to change or discontinue this product at any time, without notice. There are no express or implied licenses granted hereunder to design or fabricate any integrated circuits based on information in this document.

Windows Media and the Windows logo are trademarks or registered trademarks of Microsoft Corporation in the United States and other countries. Other product and company names contained herein may be trademarks of their respective owners.

The product shown in this data sheet is not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Any use or distribution of this product in such applications is at your own risk. Supply of this Implementation of AAC technology does not convey a license nor imply any right to use this Implementation in any finished end-user or ready-to-use final product. An independent license for such use is required.

Hardware Features Application Capability ARM Processor Core System Buses Interrupt Collector Default First-Level Page Table DMA Controller Clock Generation Subsystem Power Management Unit USB Interface Mixed Signal Audio Subsystem I2C Interface Rotary Decoder Dual UARTs Absolute Maximum Ratings Recommended Operating Conditions DC Characteristics JTAG Debugger Crystal Oscillators Clock Domains STMP 4.

Clock Dividers Integer Clock Divider Fractional Clock Divider Programming the Clock Controller Clock Frequency management Soft Reset Programmable Registers Fractional Clock Control Register Description System Software Reset Register Description ClkCtrl Version Description FIQ Generation Interrupt Sources Behavior During Reset Interrupt Collector Control Register Description Interrupt Collector Status Register Description Interrupt Collector Priority Register 0 Description Interrupt Collector Priority Register 1 Description Interrupt Collector Priority Register 2 Description Interrupt Collector Priority Register 3 Description Interrupt Collector Priority Register 4 Description Interrupt Collector Priority Register 5 Description Interrupt Collector Priority Register 6 Description Interrupt Collector Priority Register 7 Description Interrupt Collector Priority Register 8 Description Interrupt Collector Priority Register 9 Description Interrupt Collector Priority Register 10 Description Interrupt Collector Priority Register 11 Description Interrupt Collector Priority Register 12 Description Interrupt Collector Priority Register 13 Description Interrupt Collector Priority Register 14 Description Interrupt Collector Priority Register 15 Description Interrupt Collector Debug Register 0 Description Interrupt Collector Version Register Description STMP 6.

Memory Map SRAM Controls Miscellaneous Controls Performance Monitoring Write-Once Register Microseconds Counter Software Write-Once Register Description Entropy Register Description Entropy Latched Register Description Digital Control Debug Register Description Digital Control Scratch Register 0 Description Digital Control Scratch Register 1 Description STMP 7.

Software Read Sequence Software Write Sequence Write Postamble Shadow Registers and Hardware Capability Bus Customer Capability Shadow Register Description USB Controller Flowcharts Identification Register Description General Hardware Parameters Register Description Host Hardware Parameters Register Description Device Hardware Parameters Register Description STMP 9.

Programmable Burst Size Register Description Port Status and Control 1 Register Description Endpoint Setup Status Register Description Endpoint Initialization Register Description Endpoint De-Initialize Register Description Endpoint Status Register Description Endpoint Compete Register Description Endpoint Control 0 Register Description Endpoint Control 14 Registers Description Digital Transmitter

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