ATMEGA162 DATASHEET PDF

Programming the MC will change the following functionality:. The timed sequence for changing the Watchdog Time-out period is disabled. USART vs. Pin change interrupts are not supported Control Registers are located in Extended. The location of these registers will not be.

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Programming the MC will change the following functionality:. The timed sequence for changing the Watchdog Time-out period is disabled. USART vs. Pin change interrupts are not supported Control Registers are located in Extended. The location of these registers will not be. The Port A output buffers have symmetrical drive characteristics with both high sink.

When pins PA0 to PA7 are used as inputs and are externally. The Port. A pins are tri-stated when a reset condition becomes active, even if the clock is not. Port A also serves the functions of various special features of the ATmega as listed.

The Port B output buffers have symmetrical drive characteristics with both high sink. As inputs, Port B pins that are externally pulled low will source. The Port B pins are tri-stated when a reset. Port B also serves the functions of various special features of the ATmega as listed. The Port C output buffers have symmetrical drive characteristics with both high sink. As inputs, Port C pins that are externally pulled low will source.

The Port C pins are tri-stated when a reset. If the JTAG interface is. The location of these registers will not be affected by the ATmega compatibility fuse. The Port A output buffers have symmetrical drive characteristics with both high sink and source capability. When pins PA0 to PA7 are used as inputs and are externally pulled low, they will source current if the internal pull-up resistors are activated.

The Port A pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port A also serves the functions of various special features of the ATmega as listed on page Port B PB The Port B output buffers have symmetrical drive characteristics with both high sink and source capability.

As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port B also serves the functions of various special features of the ATmega as listed on page Port C PC The Port C output buffers have symmetrical drive characteristics with both high sink and source capability.

As inputs, Port C pins that are externally pulled low will source current if the pull-up resistors are activated. The Port C pins are tri-stated when a reset condition becomes active, even if the clock is not running.

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